1. Field of the Invention
This invention relates in general to wireless communication receivers. In particular, it relates to the integration of multiple signal types (CDMA, FDMA, CW, etc.), from multiple bands, with each band and signal type potentially containing multiple user channels, and a single receiver processing architecture for sequentially acquiring, and simultaneously demodulating these multiple channels.
2. Description of the Prior Art
A matched-filter is typically employed in a spread-spectrum demodulator to remove the effects of PN-spreading and allow the carrier and modulating information to be recovered. The digital implementation of a matched filter can be expressed as an integrate-and-dump correlation process, which is of relatively modest computational burden during signal tracking and demodulation. However, it is computationally and/or time intensive to acquire such a signal, where many such correlations must be performed to achieve synchronization with the transmitted spreading sequence. For each potential code-phase offset to be searched (which typically number in the thousands), sufficient samples must be. correlated to ensure that the integrated SNR is sufficient for detection. Performed one at a time, acquisition could easily take several minutes to achieve in typical applications.
For applications requiring rapid signal acquisition (i.e., seconds), a highly parallel matched-filter structure may be used to search many spreading code offsets simultaneously. Typically; this computationally expensive apparatus would be underutilized once acquisition is completed, during the much less demanding tracking operation. If the same parallel matched filter is also used for tracking purposes, only perhaps three of its numerous correlation branches (typically hundreds) are useful in this instance. Alternatively, it may be simpler to use a separate set of early, on-time, and late integrate-and-dump correlators to take over once acquisition is complete; in this case, the parallel matched filter would go completely unused during tracking.
In implementations evidenced by the prior art, the solution has generally fallen into one of several classes:
1. Slow acquisition by sequential traversal of the search space using only the hardware required for tracking a signal; dedicated hardware per channel.
2. Rapid acquisition by parallel traversal of the search space using a dedicated parallel matched filter, which is idle or shut down when dedicated tracking hardware takes over; dedicated hardware per channel.
3. Either class 1 or 2, but multi-band and/or multi-channel, using a loosely integrated but disparate collection of individual processing resources.
The present invention provides several new approaches to achieve rapid acquisition in a multi-band, multi-channel signal environment, by sharing a homogeneous collection of digital processing elements. This is done, in part, by taking maximum advantage of the computational commonality between the acquisition and tracking correlation processes. Furthermore, the mismatch in computational demand between acquisition and tracking is-exploited by creating a multi-channel, multi-band integrated receiver. Since only a small percentage of the computational resources are consumed by tracking an individual channel, the remaining resources may be employed to accelerate the acquisition of additional channels. As more resources become dedicated to tracking, fewer remain for acquisition; this has the effect of gradually reducing the number of parallel code offsets that can be searched, gradually increasing acquisition time. In many applications, such as a GPS receiver, this is quite acceptable, as. generally additional channels beyond the first four are less urgent, and are used primarily for position refinement, and back-up signals in the event that a channel is dropped.
In the first aspect of the present invention, the multi-datapath receiver architecture allows independent automatic-gain control (AGC) between multiple input bands, minimizing inter-band interference, and avoiding additive noise compared to schemes that combine the B bands into a single signal and data stream.
To accomplish this, the present invention efficiently processes B streams of W-bit complex sampled data, so that multi-band receiver signals can be kept spectrally separated. This concept can be implemented using B data storage paths shifting at the data sampling rate (Fsamp), or can alternatively be implemented by multiplexing the B streams onto B/k data storage paths each shifting at k*Fsamp.
In another aspect of the present invention, the parallel acquisition correlator, or matched-filter, aids in rapid pseudo-noise (PN)-acquisition by simultaneously searching numerous possible PN-code alignments, as compared with a less compute-intensive sequential search. Multiple channels of data may be co-resident in each band and sampled data stream using Code Division Multiple Access (CDMA) techniques, and multiple bands and sampled data streams share the common computation hardware in the Correlator. In this way, a versatile, multi-channel receiver is realized in a hardware-efficient manner by time-sequencing the available resources to process the multiple signals resident in the data shift registers simultaneously.
In still another aspect of the present invention, the matched filter is organized. into N xe2x80x9cSlicesxe2x80x9d of M-stages, each of which can accept a code phase hand-off the from the PN-Acquisition Correlator and become a PN-tracking de-spreader by providing separate outputs for early, on-time, and late correlations (with spacing depending on the sampling rate; typically half a chip). Slices are handed-off for tracking in the same direction as data flows, and correlation reference coefficients, are shifted (for instance, left to right)xe2x80x94this permits shifting data to be simultaneously available for the leftmost Slices that are using the data for tracking, and rightmost Slices that are using the data for acquisition. Each slice can choose between using and shifting the acquisition reference coefficient stream to the right, or accepting the handoff of the previous acquisition reference coefficient stream and using it to track the acquired signal.
In still another aspect of the present invention, the Acquisition correlator can integrate across all available Slices to produce a single combined output, or the individual Slice integrations can be selectively output for post-processing in the case of high residual carrier offsets or high-symbol rates, where the entire N*M-stage correlator width cannot be directly combined without encountering an integration cancellation effect.
In yet another aspect, the present invention embodies a Scaleable Acquisition Correlator, which when tracking a maximum of G independent signals, can use the remaining N-G Slices to search for new signals, or for fast re-acquisition of dropped signals. Initially, Slices will be allocated sequentially (for instance, from left to right), but after running for some time, with signals alternately being acquired and dropped, the Slice allocation will most likely become fragmented, resulting in inefficient use of the Acquisition Correlator. This can be resolved by implementing a de-fragmentation algorithm that swaps tracking Slices around dynamically to maximize the number of contiguous rightmost Slices, and thus optimize Acquisition. A global mask allows setting arbitrary width of the Acquisition Correlator.
In another aspect, the present invention contains G independent numerically-controlled oscillator (NCO)-based PN-Code Generators with almost arbitrary code rate tracking resolution (for example, better than 0.0007 Hertz for 32-bit NCO at 3 Mcps). All NCO""s run using a single reference clock which is the same clock that is used for all signal processing in the Matched-Filter. Ultra-precise tracking PN Code phase is maintained in the G independent phase accumulators. Multi-channel NCOs are efficiently implemented by sharing computational resources and implementing phase accumulation registers in RAM, for the case when the processing rate is in excess of the required NCO sampling rate.
In still another aspect of the present invention, the PN-Code Generators use L-by-2 random-access memory (RAM) look-up tables for independent in-phase/quadrature (I/Q) code generation, using length-L arbitrary code sequences. Depending on the size of available RAM blocks, and whether the NCO sampling rate is less than the available processing rate, either one RAM block per channel is required to store the PN-sequence, or RAM blocks could be shared between two or more channels.
In still another aspect of the present invention, a RAM-based architecture exploits high-density implementation in field-programmable gate-arrays (FPGAS) and application-specific integrated circuits (ASICs) by taking advantage of processing rates (Fproc) much greater than the data sampling rate (Fsamp). RAM is used for all data shift-registers, Code Generators, and NCOs for efficient hardware utilization; furthermore, due to the processing rate being greater than the data sampling rate, less computation hardware is required, and can be shared to satisfy the needs of multiple stages (basically, reduced according to Fsamp/Fproc).
In another aspect of the present invention, a register-based architecture variant allows for much higher sampling rates (equal to the processing rate); registers are used for all data shift-registers. It is also possible to implement a hybrid architecture that may utilize any combination of RAM-based and register-based implementations.
A further aspect of the present invention adds a PN Chip-shaping poly-phase interpolation filter utilizing precisely known PN Code Phase, in conjunction with known past, present, and future PN sequence, in conjunction with anticipated transmitted spectral shaping characteristics, to shape the Matched Filter reference waveform to more closely match the distortions of the incoming signal. This reduces correlator implementation loss due to asynchronous sampling of the received signal and single-bit quantization of the reference waveform, particularly for the case of tapping only a single sample per chip.
In yet another aspect, the present invention allocates 4 or more Channels, and one Band, to receiving GPS signals and thus deriving periodic time and position calculations, and then utilizing the remaining receiver resources to process another signal of perhaps primary interest. The precise derivation of time, and therefore frequency, from the GPS allows the frequency error inherent to the local reference oscillator to be measured and corrected (to a level approaching the accuracy of the GPS ground station reference over long periods), thus having the potential of significantly improving the receiver performance with regard to the primary signal of interest.